Design of a Low Power and High Speed Wallace Tree Encoder for Flash ADC

Abstract

An improved design of Wallace tree encoder is presented in this paper. Wallace tree encodes a thermometer code into binary code in a Flash ADC. It has the advantage of correcting bubble errors without the need of an extra bubble error correcting (BEC) block. It consists of full adder circuits and adds the number of 1’s generated through the comparator output in a Flash ADC. The new Wallace tree encoder is compared with the previously designed traditional Wallace tree encoder in 45nm technology. The results show that new design is efficient than the previous design. The proposed encoder dissipates 9.61μW power and has a delay of 29.5ps. The PDP and EDP is calculated to be 0.28 fJ and 0.83x10-26 Js.