Design of 1.2 kV SiC trench MOSFET using tilted ion implantation for suppression of electric field crowding at the bottom of the gate oxide

Abstract

In this study, the effect of applying the tilted ion implantation process of a 1.2 kV SiC trench metal–oxide–semiconductor field-effect transistor on the electrical characteristics of the devices was investigated. P-shielding with tilted ion implantation protects both the sidewall and bottom of the trench from an electric field, enabling stable high-voltage operation, and the cell pitch can be reduced by using only one channel. Moreover, the tilted ion implantation process has the advantage of not requiring additional masks. For a comparative analysis, the tilt angle for ion implantation into the trench was changed in a TCAD simulation. A high breakdown voltage of 1617 V was achieved under an optimized tilt angle of 18.2°, and a low on-resistance of 2.9 mΩ cm2 was obtained via structural optimization.