Abstract
Wireless Network-on-Chip (WiNoC) architectures with CMOS compatible millimeter-wave (mm-wave) transceivers can achieve significant improvements in energy-efficiency in on-chip data transfer for multicore chips. A token based medium access mechanism is used in mm-wave WiNoC architectures to enable a distributed utilization of the available wireless bandwidth among multiple transmitters. However, on-chip wireless interconnects can suffer from high rates of failures due to challenges in design and manufacturing. Consequently, the token-passing mechanism can fail and significantly degrade the potential benefits of this novel interconnect technology. In this paper, we establish a cross-layer robust and failure-resistant design methodology for WiNoC architectures. By optimizing the WiNoC topology and complementing it with a robust token management scheme and error correction codes, we propose to design a failure-resistent WiNoC. Through system-level simulations, we demonstrate that the proposed design can mitigate the effect of various types of failures of the wireless fabric in WiNoC architectures without compromising the energy-efficiency.
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