A Novel, Simulator for Heterogeneous Cloud Systems that Incorporate Custom Hardware Accelerators

Abstract

The growing use of hardware accelerators in both embedded (e.g., automotive) and high end systems (e.g., Cloud infrastructure) triggers an urgent demand for simulation frameworks that can simulate in an integrated manner all the components (i.e., CPUs, Memories, Networks, and Hardware Accelerators) of a system-under-design(SuD). By utilizing such a simulator, software design can proceed in parallel with hardware development which results in the reduction of the so important time-to-market. The main problem, however, is that currently there is a shortage of such simulation frameworks; most simulators used for modelling the user applications (i.e., full-system CPU/Mem/Peripheral simulators) lack any type of support for tailor-made hardware accelerators. The presented ACSIM framework is the first known open-source, high-performance simulator that can handle holistically system-of-systems including processors, peripherals, accelerators, and networks; such an approach is, for example, very appealing for the design of Cloud Servers that incorporate FPGAs as PCI-connected accelerators. ACSIM is an extension of the COSSIM simulation framework and it integrates, in a novel and efficient way, a combined system and network simulator with a SystemC simulator, in a transparent to the end-user way. ACSIM has been evaluated when executing several real-world use cases; the end results demonstrate that the presented approach has up to 99 percent accuracy in the reported SuD aspects (when compared with the corresponding characteristics measured in the real systems), while the overall simulation time can be accelerated almost linearly with the number of CPUs utilized by the simulator. More importantly, the presented interconnection scheme between the Processing and the SystemC simulators is orders of magnitude faster than the existing solutions, while ACSIM can efficiently simulate up to several hundreds of processing nodes with hardware accelerators interconnected together, in a fully distributed manner.