Abstract
Design solutions of domestic VLSI were obtained as a result of the application of computeraided design tools of a foreign supplier (CAD Synopsys, Cadence Design Systems and Mentor Graphics), based on standard libraries of PDK elements (Project Design KIT) of factories and IC-modules also supplied mainly by foreign companies. As a rule, the developer does not have its own production facilities, using the services provided by foreign factories (fablesscompanies). Due to this fact, relevant are the studies aimed at the development of a complex of measures, excluding the possibility of unauthorized changes into IC, i.e. protection of projects against intentional hardware and technology violations made during the formation of the control information for handing it over to the production facility and/or in case of IC manufacture at the factory. This paper considers this task from the standpoint of the analysis of the methodology of design for testability (DFT), i.e., a complex of measures that provide obtaining solutions at the design stage. The solutions include the verification of the correct performance of the manufactured chip by means of external tests and/or self-testing procedures. It was proposed, inter alia: 1) to analyze the libraries of standard elements used in the project with full disclosure of their specifications; 2) to create nodes with the physical non-cloning function in the projects on the basis of the libraries of standard elements in models and analysis programs; 3) to analyze IP modules used in the project with the maximum disclosure of structure, methods and algorithms for providing test coverings; 4) to provide for the development in projects of special test kits and methods of their generation at the design stage of functions in order to detect malicious nodes and programs both within SoC cores and at the level of system buses; 5) to develop at the design stage and to apply during tests a technique of special hardware measurements of parameters of the manufactured circuits and analysis of their results, inter alia, according to measurements of delays in distribution of signals and/or buses current consumption.
Highlights
Despite numerous procedures of verification of an IC project, chips that have already been manufactured may contain defects that disrupt its performance
Verification of IC after its manufacture is a complex and expensive procedure that requires the solution of a whole range of engineering tasks
While implementing DFT strategy, one should consider that the test covering, which provides for the enumeration of all possible combinations of input signals, considering VLSI of the microprocessor as a serial device with a set of output statuses determined by the inputs and internal statuses (Mealy machine) is almost impossible, as it will require resources impractical from the technical point of view
Summary
Despite numerous procedures of verification of an IC project, chips that have already been manufactured may contain defects that disrupt its performance. The contemporary approach to IС design is based on the concept of embedding additional components into the project. They are designed to check VLSI for defects. Such design methodology with the possibility of testing or designing for the implementation of controllability (Design for Testability, DFT) is currently an integral part of all commercial integrated circuit projects, such as microprocessors, systems on chip or systems in package [1,2,3]
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
