Design, Fabrication, and Characterization of Ultrathin 3-D Glass Interposers With Through-Package-Vias at Same Pitch as TSVs in Silicon

Abstract

A double-sided and ultrathin 3-D glass interposer with through package vias (TPVs) at same pitch as through silicon vias (TSVs) in silicon interposers is developed to provide a compelling alternative to 3-D IC stacking of logic and memory devices with TSVs. The 3-D IC stacking approach to achieve high bandwidth has several drawbacks, including the need for TSVs through the logic die, thermal management within the 3-D stack, and the high manufacturing cost associated with wafer-based TSV processing. This paper presents design, fabrication, and electrical characterization of small TPVs (15–40 $\mu{\rm m}$ in diameter) in 30- $\mu{\rm m}$ thin glass to achieve an ultrathin 3-D interposer. This paper also reports the first demonstration of ultrasmall TPVs in glass (15 $\mu{\rm m}$ ) with same dimensions as TSVs in silicon. The signal insertion loss and crosstalk behavior of TPVs in ultrathin glass were investigated and found to be superior to TSVs using 3-D electromagnetic simulations. In demonstrating the 3-D interposers, two process-related challenges were addressed in this paper, namely: 1) defect-free formation of ultrasmall TPV holes with diameters of 15 $\mu{\rm m}$ at 27- $\mu{\rm m}$ pitch and 2) TPV metallization with copper. The fabricated TPVs in ultrathin glass showed a good model to hardware correlation of signal transmission with insertion loss ${ at 20 GHz. The results in this paper suggest that the 3-D interposer concept can be a simpler alternative to 3-D IC stacking with TSVs to achieve high bandwidth between the logic and memory devices.