Design and verification of the sequential systems automata using temporal logic specifications

Abstract

A design and verification method of sequential systems automata using temporal logic specifications is proposed. The method is based on well-known Z.Manna and P.Wolper temporal logic satisfiability analysis procedure. A new satisfiability analysis algorithm for temporal logic specifications which includes past time as well as future time temporal logic operators is proposed. The method is developed to facilitate the design of the finite state automata of the sequential systems and is based on the analysis of the temporal logic specifications which describe the desired input/output behaviour of the systems. The method is dedicated: -to facilitate the design of the sequential systems finite state automata; -to verify the correctness of the finite state automata implementation; provided the timing charts are given in both cases and the initial automaton of the system is also known in the verification case. A case study is carried out which deals with two examples.