Abstract
In this paper, design and simulation of novel random access memory (RAM) cells using single electron tunneling (SET) technology based threshold logic gate (TLG) are presented. RAM cell designs based on RS-latch and D-latch are investigated with the aim of reducing the area, switching delay, and energy consumption. The designed circuits are simulated using Monte Carlo simulation. According to the simulation results, the circuits operations based on the transfer of single electrons between adjacent islands are stable.
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