Design and simulation of high gain PHEMT low noise amplifier (LNA)

Abstract

This paper presents a 5.8 GHz low voltage, low power, and wide band LNA design using PHEMT transistor. The simulated LNA is a single stage with pi input and output matching circuits. The noise canceling principle and sensitivity analysis is performed for the simulated low noise amplifiers. The simulated results are compared with identical LNA published and give a significant increase in the gain by more than 23 % at the same noise figure, input and output return loss. Another LNA is optimized in the design to achieve a maximum gain with low noise figure and input, output return loss which gives a maximum gain of 16 dB at 3GHz frequency with 0.65 Noise figure.