Abstract

Ferroelectric random access memory (FeRAM) is a promising candidate to substitute static random access memory (SRAM) in lookup table (LUT) design due to its high density, high speed operation, anti-radiation and non-volatility. Ferroelectric gate field effect transistors (FeFETs) have been extensively studied and its usage in memory elements and basic analog circuit configurations has gained much interests. Here, we propose a novel architecture of FeFET-based LUT. An improved timing mode of FeRAM chip is analyzed to satisfy the performance of the FeFET-based LUT. Decoder, driver circuit and sensitive amplifier for FeFET array are also proposed. All the simulation results show that the proposed LUT works properly when the frequency reaches 500 MHz at 0.3 V differential input signal.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.