Abstract

In this paper, a systematic method for the circuit parameters design of a monolithic LC Voltage Controlled Oscillator (VCO) is reported. The method is based on the negative resistance generation technique. As a result, a VCO has been designed in 0.18um CMOS technology using a conventional VCO structure to obtain the optimum values for the phase noise and power consumption. The simulation results prove that the proposed approach is very reliable and can be developed further for more complex structures. In this paper, the minimum phase noise of -110.94 dBc/Hz has been obtained at 1 MHz offset frequency at the operating frequency of 10.67 GHz. Furthermore, the designed VCO has the low power consumption of 1.8 mW at the fundamental frequency. In addition, the designed VCO has 1280 MHz of tuning range from 9.39 GHz to 10.67 GHz around the central frequency of 10 GHz. Also, simulation results show that the maximum output power of the signal in the designed VCO is 6.24 dBm.

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