Abstract
In cpu design, the register file is a necessary device which save the instruction and data. In this paper, we propose a design method for multi-port register file design in the environment of single-cycle CPU system based on the MIPS instruction set and according to the characteristics of multi-port register file,and the VHDL langauge is introduced in order to speed up the development cycle. Furthermore, we discuss the consideration and operational principle of design and realization in detail.The simulation results for the part constructed by FPGA are also presented. In this example which provides the learning and design innovation for other circuit designed.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
