Design and investigation of double-RESURF SOI-LIGBT with carrier-storage layer in P-top

Abstract

A novel double-RESURF SOI-LIGBT with carrier-storage layer in P-top (CSLP-LIGBT) is proposed and studied by simulation. The carrier storage layer avoids direct connection between the P-top region and the P+ region, enhancing the carrier storage effect in the drift region during the on-state. CSLP-LIGBT provides a fast hole-extraction channel during the turn-off transient, shortening the turn-off time and decreasing the turn-off loss (Eoff). The simulation results show that at the same on-state voltage (VCE(sat)) of 1.12V and temperature is set to 300K, the turn-off loss of the CSLP-LIGBT is 25.49%, 35.59%, and 44.12% lower than that of the double-gate SOI-LIGBT (DG-LIGBT), double-RESURF SOI-LIGBT with floating P-top (FPDR-LIGBT), and double-RESURF SOI-LIGBT (DR-LIGBT), respectively. The CSLP-LIGBT effectively improves the tradeoff relationship between VCE(sat) and Eoff without sacrificing breakdown voltage and process complexity.