Theoretical Performance Limit of the IGBT

Abstract

In this paper, an analytical model of insulated gate bipolar transistor (IGBT) on-state voltage ( ${V}_{\mathrm {{ {{ON}}}}}$ ) and turn-off loss ( ${E}_{\mathrm {{ {{OFF}}}}}$ ) is developed to find the optimum solution (minimum power loss) for a given application. With this model, it is found that IGBT on-state voltage is limited by the fact that holes can only flow from the anode to the cathode. The minimum on-state voltage for a Si IGBT with 110- $\mu \text{m}$ wide drift region is found out to be around 0.835 V at 100 A/cm2 and room temperature. For a given operating frequency and chip size, a tradeoff between on-state voltage and turn-off loss that gives minimum device power loss can be achieved by manipulating the carrier profile in the drift region with an optimum structure design. This minimum device loss decreases mildly with increasing chip size, i.e., a merely 45% loss reduction when the chip size increases from 0.2 to 5 cm2. These results clearly indicate that the performance of an IGBT is not area sensitive. They are encouraging for device manufacturers who wish to reduce the device chip size to lower cost. However, the constraint comes from the device thermal dissipation capabilities which decrease quickly with decreasing chip size. These results are validated with numerical 2-D device simulations for a large variety of device structures, chip size, and operating frequencies (2 to 200 kHz). State-of-the-art IGBT product performance is compared against the theoretical limit indicating there is still substantial room for improvement at low and high frequencies.