Design and Investigation of a Novel Charge Plasma-Based Core-Shell Ring-TFET: Analog and Linearity Analysis

Abstract

A novel device architecture charge plasma-based Ring-TFET (CP-RingTFET) has been described in this work. The ring structure of the proposed device uses a core-shell architecture with a drain at the center covered with the channel and followed by the source. The ring structure has the advantage of ultrascaling and mechanical strength as compared to the nanowire structure. The performance characteristics of the Ring-TFET are much better as compared to nanowire-TFET with similar physical dimensions. To investigate the impact of charge plasma on RingTFET architecture, various analog and linearity parameters have been studied; such as OFF-state current ( ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ ), ON-state current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ), ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ , subthreshold slope (SS), gate-to-gate capacitance, transconductance ( ${g}_{m}$ ), transconductance gain factor (TGF), threshold voltage ( ${V}_{\text {TH}}$ ), higher-order transconductances, higher-order harmonic distortions, third-order current intercept point (IIP3), third-order intermodulation distortions (IMD3), and higher-order voltage intercept points. The ability of the CP-RingTFET to enhance the performance of the proposed device is confirmed with the reduction of ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ , improving ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ , lower SS including the benefits of threshold voltage reduction.