Design and implementation of super-heterodyne nano-metrology circuits

Abstract

The most important aim of nanotechnology development is to construct atomic-scale devices, and those atomic-scale devices are required to use some measurements that have ability to control and build in the range of these dimensions. A method based on super-heterodyne interferometers can be used to access the measurements in nano-scale. One of the most important limitations to increase the resolution of the displacement measurement is nonlinearity error. According to the base and measurement signals received by optical section of super-heterodyne interferometer, it is necessary for circuits to reconstruct and detect corresponding phase with target displacement. In this paper, we designed, simulated, and implemented the circuits required for electronic part of interferometer by complementary metal-oxide-semiconductor (CMOS) 0.5 μm technology. These circuits included cascade low-noise amplifiers (LNA) with 19.1 dB gain and 2.5 dB noise figure (NF) at 500 MHz frequency, band-pass filters with 500 MHz central frequency and 400 kHz bandwidth, double-balanced mixers with 233/0.6 μm ratio for metal-oxide-semiconductor field-effect transistors (MOSFETs), and low-pass filters with 300 kHz cutoff frequency. The experimental results show that the amplifiers have 19.41 dB gain and 2.7 dB noise factor, mixers have the ratio of radio frequency to local oscillator (RF/LO) range between 80 and 2500 MHz with intermediate frequency (IF) range between DC to 1000 MHz, and the digital phase measurement circuit based on the time-to-digital converter (TDC) has a nanosecond resolution.