Design and implementation of reversible logic gates using silicene-based p–n junction logic devices

Abstract

Advancements in adiabatic quantum computing have enabled a rapid development in thermodynamically reversible logic circuits, which can reduce energy wastage to almost negligible levels. Various reversible logic gates using silicene-based multiplexer logic devices (SMLDs) are designed and demonstrated herein using Verilog-A, then validated by SPICE circuit simulations. The results confirm that the various reversible gates correctly implement the corresponding truth tables, thereby validating the use of SMLDs as building blocks for such gates. The SMLD-based reversible logic gate designs enable a reduction in hardware complexity by 76.92–80.64% compared with complementary metal–oxide–semiconductor (CMOS) technology and a 50% reduction in hardware compared with pass transistor logic-based designs, respectively.