Abstract
Objective: Design of quadriphase codes with superior merit factor in basically a nonlinear multivariable optimization problem. Quadriphase transformation is applied to low side lobes in bi phase generation of binary sequence. In order to provide real time hardware for identification and generation of quadriphase pulse compression sequences. Methods/ Statistical Analysis: An efficient VLSI architecture has been proposed. The objectives to achieve high main lobe and low side lobes by poly phase codes. Findings: Initially pulse compression techniques are applied followed by binary quadriphase transformation. By applying a transformation to the biphase code using of sub pulses consequently results in the generation of codes. Near constant envelopes are created. Improvements/Applications: The systematic quadriphase sequences are useful for application to radar and continuation. There is scope for further development of merit factor. Keywords: Merit Factor (MF), Pseudo Random Binary Sequence (PRBS) Generator, Pulse Compression, Quadriphase Sequence
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