Abstract
Pseudorandom number generators (PRNGs) are important role in cryptography application. Hardware based random number generators become faster. Field Programming Gate Arrays (FPGA) is one of the most valuable devices in hardware industry. This paper presents multibit linear feedback shift register (LFSR) based PRNGs circuit designed with hardware description languages (HDL). In multibit LFSR system, multiple bits are shift in every clock cycle where a single bit is shift in a conventional LFSR method. This technique is very much applicable in cryptography area. The proposed various bit length multibit LFSR architectures are synthesized using Xilinx ISE 14.7 and Spartan 6 FPGA to target device XC6SLX45. The result analysis indicates that 32-bit length multibit LFSR architecture is better performance than other architectures.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
