Abstract
The solution for a set of liner equations require to find the matrix inverse of a square matrix with same number of the linear equations, this operation require many mathematical calculations. To solve this problem, LU decomposition for the matrix is used, which computes two matrices, a lower triangle matrix and an upper triangle matrix. In this, paper a design for 32-bits MIPS (microprocessor without interlocked pipelined stages) processor with the required instructions that used to calculate the LU matrices. The design implemented using VHDL (Very high speed integrated circuit hardware description language) then integrated with FPGA (Field Programmable Gate Arrays) Xilinx Spartan 6. The results for the different parts of the processor are resented in the form of test bench waveform and the architecture of the system is demonstrated and the results was matched with theoretical results.
Highlights
Matrix inversion is a well-known operation that be used by several algorithms, for example in solving simultaneous equations
An alternative method is by using the LU decomposition instead of the matrix inversion
Control unit internal architecture the results was matched with theoretical results as there is no research/paper been done before for LU decomposition to do a comparison
Summary
Matrix inversion is a well-known operation that be used by several algorithms, for example in solving simultaneous equations. The matrix inversion requires a lot of mathematical operations that cannot able to perform the operation in real time demand. An alternative method is by using the LU decomposition instead of the matrix inversion. The LU-decomposition method is first “decomposes” matrix A into two matrices L and U. If A is an n×n matrix, the first matrix is Lower triangular and the second matrix is an Upper triangular, both were an n×n matrices as shown below in the following set equations for a 3x3 matrix: A = LU (1).
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