Design and Implementation of an Asymmetric Cascaded H-bridge Fifteen Level Inverter with Minimum Number of Switches for Smart Grid Applications

Abstract

Multilevel inverters are nowadays getting more and more attention in the industrial world due to the attractive features offered by the multilevel inverters. However, usage of more semiconductor switches in the higher levels of these inverters poses a restriction to its wider applications in the industries. Therefore, a novel fifteen level inverter of cascaded H-bridge topology is being designed and implemented, that incorporates the minimum number of switches, thus confirms the reduction in size, minimum switching losses and further reduction in overall cost of the multilevel inverter. The foremost concern of the suggested work is to improve the efficiency and quality of the desired voltage waveform of the multilevel inverter using the effective controlling strategies keeping harmonics at a lower level. The control methods are applied to the fifteen level inverter for further improvement in the voltage regulation and thereby lead to the better efficiency, reliability and economic improvement. The performance assessment of the implemented fifteen level inverter has been done in respect of the total harmonic distortion and switching losses and is compared with the other existing topologies. The implemented inverter is well suited for drive, renewable energy and smart grid applications.