Abstract
In this paper, we present an automatic soft IP (Intellectual Property) generation method for high-speed Viterbi decoders. In our scheme, the synthesizable HDL (Hardware Description Language) code for the Viterbi decoder is automatically produced depending on not only the system parameters such as a coding rate but also the hardware architecture for parallel processing. The proposed method is implemented by using C++ language, and the HDL codes automatical-ly generated by the computer program are verified by using an HDL simulator and synthesized into gate-level circuits with 0.13um CMOS library. From the results, we can find that the proposed method can be a good solution to reduce the time required for hardware design of Viterbi decoder considerably because our scheme can prevent from potential human errors effectively in the HDL code design process.
Published Version
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