Design and Implementation of a Hybrid UWB Pulse Generator for Automotive Radar

Sang-Dong Kim,Jonghun Lee

doi:10.5755/j01.eee.20.3.2774

Abstract

The design of a hybrid pulse generator that supports a variable pulse width and a pulse repetition interval (PRI) is proposed and demonstrated for an ultra-wide band (UWB) pulse-Doppler radar. UWB pulse-Doppler radar is required for implementing full digital systems for reliability and flexibility regardless of temperature. It is difficult to apply existing analog components and digital pulse generators with broadened pulse widths. To overcome these limitations, the pulse generator is developed using a digital pulse generator and a 24 GHz RF transmitter. The digital pulse generator is composed of a narrow bandwidth (NB) pulse generator and a pulse chopper based on a serializer-deserializer (SerDes) block on a field-programmable gate array (FPGA). The 24 GHz RF transmitter adopts a homodyne architecture. The digital pulse generator required 1 % of the FPGA Slice registers and 1 % of the FPGA Slice LUTs on a Xilinx Virtex-5 lx50. Using a 2 ns pulse width resolution and an 8 ns PRI resolution, we were able to change the pulse width and the PRI. The pulse width can be measured over the duration of 2 ns to 10 ns. DOI: http://dx.doi.org/10.5755/j01.eee.20.3.2774

Highlights

Vehicle radar has received much attention in recent years as a means of short distance vehicle detection for Intelligent Transport Systems (ITS) [1]
Conventional analog High Frequency (HF)-based pulse generators were less tunable for pulse width and pulse repetition interval (PRI) and show reduced variation according to temperature
We used an narrow bandwidth (NB) pulse generator with an low clock (LC) and a pulse chopping technique with high clock (HC) based on a SerDes block

Summary

INTRODUCTION

Vehicle radar has received much attention in recent years as a means of short distance vehicle detection for Intelligent Transport Systems (ITS) [1]. Because SRR is used in vehicles, the Federal Communications Commission (FCC) has dedicated the spectrum from 22 to 29 GHz for UWB radar with a power limit of –41.3 dBm/MHz [4]. UWB radar needs to implement a pulse generator with a 2 ns pulse width to satisfy the regulations of the FCC. CMOS-based pulse generators have received much attention for single chip applications. Due to the critical path of the FPGA, FPGA-based digital pulse generators yield a broadened pulse width with a narrow bandwidth. To avoid this problem, we use a narrow bandwidth (NB) pulse generator with a low clock (LC) and a pulse chopping technique with a high clock (HC) based on a serializer-deserializer (SerDes) block.

IMPLEMENTATION OF A HYBRID UWB PULSE GENERATOR

UWB Digital Pulse Generator

UWB RF Transmitter

IMPLEMENTATION OF THE HYBRID UWB PULSE GENERATOR AND THE MEASURED RESULTS

Findings

CONCLUSIONS