Design and implementation of a high‐performance V‐band CMOS bandpass filter

Abstract

AbstractIn this article, we demonstrate a low‐insertion‐loss V‐band (50–75 GHz) bandpass filter with two finite transmission zeros by standard 0.13 μm CMOS technology. The proposed filter architecture has the following feature: the low‐frequency transmission‐zero and the high‐frequency transmission‐zero can be tuned by the series‐feedback capacitor Cs and the parallel‐feedback capacitor Cp, respectively. Besides, low‐insertion‐loss is achieved by adopting thick microstrip‐line (MSL) with optimized ground‐plane pattern as the needed inductors to minimize the metal and substrate loss. This filter achieved insertion‐loss (1/S21) lower than 3 dB over the frequency range of 52.2–76.7 GHz, input return loss (S11) better than −10 dB over the frequency range of 50.2–80.6 GHz, and output return loss (S22) better than −10 dB over the frequency range of 50.2–77.3 GHz. The minimum insertion‐loss was 2.18 dB at 63.5 GHz, an excellent result for a V‐band CMOS bandpass filter. The chip area was only 0.466 × 0.307 mm2, i.e., 0.143 mm2, excluding the test pads. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 309–316, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24935