Design and Implementation Based the SOPC of the 2D-FFT Processor

Abstract

This paper analyzed the principle of the two-dimensional FFT algorithm, and adopted the time domain extracted base 2D-FFT algorithm and CORDIC to achieve a one-dimensional FFT IP core in Quartus II platform, then used this IP core matrix transposition module to structure 2D-FFT core processing unit desired. In SOPC system, we adopted custom components and IP core packaging technology and adding the integration of the module. Completed the design of SOPC system, which was simulated and downloaded to the development board for verification and the test results were compared to the Matlab operation results. The simulation and test results showed that this design had a simple hardware structure, high throughput, high stability and a good prospect.