Abstract
Large Area Picosecond Photodetectors (LAPPD) are a new generation of microchannel plate photomultipliers being manufactured by Incom. These devices feature large sensitive area of 350 cm2, high quantum efficiency (∼ 20%), and tens of picosecond single photon timing resolution. LAPPDs use an anode structure with 28 striplines, allowing for spatial resolution of 1 ÷ 3 mm while minimizing the number of readout channels. In this report, we present our design of integrated readout electronics for the LAPPD . These electronics read out all 2×28 channels of a stripline-anode LAPPD . Waveform sampling at up to 5GSPS is performed by 8 DRS4 switched-capacitor array ASICs. All DRS4 channels are digitized in parallel with two 32-channel ADCs. An on-board FPGA coordinates digitization and readout of waveforms, and could further be expanded to include some waveform processing. Data packages built in the FPGA are sent to a data acquisition system (DAQ) via optical fiber, with a baseline Gigabit Ethernet interface implemented entirely on the FPGA . The electronics is designed to accommodate different triggering options: self-triggering using DRS4 transparent mode and external triggering, making event control very flexible. Further flexibility is enhanced with embedded software for an on-FPGA soft-core processor, as well as DAQ readout and control software. The device is plug and play with any existing IP network. An open-source ecosystem is being developed to provide full control of the device operation and an easy way to integrate it to any environment. In the report we describe the status of the electronics development, its firmware and readout software. Also the results of the first tests of the electronics with the LAPPD devices will be presented.
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