Abstract
This paper presents the design and experiments of a SiC power MOSFET-based bidirectional switching power pole (BSPP) by benefiting from the advantages of SiC power MOSFETs: high-speed switching, high power density, and low power losses. The goal of the work is to design a printed circuit board (PCB) power traces of the BSPP with the minimum parasitic inductance and balanced switching transient performance between the high-side and low-side power MOSFETs. With such power traces, it is possible to reach the best switching performance with SiC power MOSFETs. A prototype BSPP with SiC power MOSFETs was developed and tested. A simulation of the prototype circuit model was built using Cadence simulation tools. The simulation and experimental results were compared to validate the model parameters and the calculated parasitic inductance of the PCB power traces.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
