Abstract

In this paper, parasitic silicon controlled rectifiers (SCRs) in both the drift and drain regions of 0.5-μm 300-V circular ultra-high-voltage n-channel laterally-diffused MOSFETs (UHV-nLDMOSs) were modulated to improve the resistance of the LDMOSs to electrostatic discharge (ESD). Results from a semiconductor curve tracer and transmission-line pulse system behaved that the LDMOSs exhibited normal characteristic curves and the breakdown voltage of the devices increased after their drift-region width was adjusted. This indicates improvements in the ESD resistance of the LDMOSs. Moreover, the secondary breakdown voltage (I t2 ) of nLDMOSs, after the addition of a central parasitic SCR to their drain center, rose from 2.884 to 3.24 A (12.34%) relative to the reference nLDMOS. The I t2 of nLDMOSs with a halved SCR—which reduces the on-resistance path and on-resistance—increased by 62.5% to 4.686 A. The I t2 of nLDMOSs with a halved-discrete SCR increased by 58.7% to a respectable 4.577 A, even though the devices had smaller oxide-defined (OD) regions and fewer contact holes. Notably, the I t2 of nLDMOSs with a purely central SCR obtained by removing n+ from their drain regions increased by 57.94% to 4.555 A, comparing favorably to those with parasitic SCRs. The trigger voltage (V t1 ) of nLDMOSs with parasitic SCRs, which had low on-resistance, was slightly lower than that of the reference nLDMOS. The V t1 of LDMOSs with a purely halved SCR was the lowest. The holding voltage (V h ) of nLDMOSs with parasitic SCRs in their drain regions declined by a mere 4.5% compared with the reference nLDMOS.

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