Abstract

A novel monolithic pixelated sensor and readout chip, the compact linear collider tracker detector (CLICTD) chip, is presented. The CLICTD chip was designed targeting the requirements of the silicon tracker development for the experiment at the compact linear collider (CLIC) and has been fabricated in a modified 180 nm CMOS imaging process with charge collection on a high-resistivity p-type epitaxial layer. The chip features a matrix of $16\times 128$ elongated channels, each measuring $300\times 30\,\,\mu \text {m}^{2}$ . Each channel contains 8 equidistant collection electrodes and analog readout circuits to ensure prompt signal formation. A simultaneous 8-bit time-of-arrival (with 10 ns time bins) and 5-bit time-over-threshold measurement is performed on the combined digital output of the 8 subpixels in every channel. The chip has been fabricated in two process variants and characterized in laboratory measurements using electrical test pulses and radiation sources. Results show a minimum threshold between 135 and 180 e− and a noise of about 14 e− rms. The design aspects and characterization results of the CLICTD chip are presented.

Highlights

  • M ONOLITHIC CMOS pixel technologies are considered for the tracking detector of the proposed future compact linear collider (CLIC) [1]–[3]

  • The compact linear collider tracker detector (CLICTD) chip was designed in the framework of the CLIC silicon tracker study and features a sensitive area of 4.8 × 3.84 mm2, with 16 columns by 128 rows of elongated channels, each measuring 300 × 30 μm2

  • For the process variant with the gap in the n-type implant, a similar bias voltage should be applied to the two nodes such that the current is not dominated by the punchthrough current flowing between the p-wells and substrate

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Summary

INTRODUCTION

M ONOLITHIC CMOS pixel technologies are considered for the tracking detector of the proposed future compact linear collider (CLIC) [1]–[3]. K. Dort is with CERN, 1211 Geneva, Switzerland, and with the Department of Experimental Physics II, Justus-Liebig-Universität Giessen, 35390 Giessen, Germany. J. Kröger is with CERN, 1211 Geneva, Switzerland, and with the Department of Physics and Astronomy, Ruprecht Karls Universität Heidelberg, 69117 Heidelberg, Germany. M. Williams is with CERN, 1211 Geneva, Switzerland, and with the School of Physics and Astronomy, University of Glasgow, Glasgow G12 8QQ, U.K. Color versions of one or more of the figures in this article are available online at http://ieeexplore.ieee.org. The design and characterization of a pixelated monolithic CMOS integrated circuit, the CLIC tracker detector (CLICTD) chip, are presented. The chip features an elongated readout channel geometry with an innovative subpixel segmentation scheme, to achieve a high measurement.

CLICTD CHIP
Chip Fabrication Process
Analog Front-End
Digital Logic
Periphery Electronics and Interface
Chip Integration and Verification
MEASUREMENT RESULTS
Electrical Characteristics
Optimization of Operation Parameters
Threshold Equalization
Optimization of Operation Threshold
Calibration With Radiation Sources
ToT Calibration
Power Consumption
Detection of Minimum Ionizing Particles
CONCLUSION AND OUTLOOK
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