Abstract

In this paper, a two-stage harmonic rejection mixer (HRM) with 16-phase local oscillator (LO) signal is presented to solve harmonic mixing problem in wideband receivers. A two-stage architecture is used to reduce the sensitivity of gain mismatch for high harmonic rejection ratio (HRR) and 16-phase LO for a high order HRR from 2nd to 14th. This design is implemented in 180 nm CMOS. Monte Carlo Sampling Simulation shows 13.74 dBm in-band IIP3 and 12.18 dB DSB noise figure (NF) with the gain of 32.33 dB. The value of HRR remains above 70 dB in 80 points at 1.6 GHz clock. The total power consumption is 23.57 mA from a 1.8-V supply.

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