Abstract
A harmonic rejection mixer (HRM) with a programmable local oscillator (LO) frequency is presented. The design allows for the generation of multiple effective LO frequencies within a single HRM that are derived from a single primary clock frequency, without any modifications to the analog signal path. A 16-phase HRM with the proposed frequency synthesis technique is implemented in a 130-nm CMOS process. A clocking approach within a two-stage HRM is presented, which reduces HRM sensitivity to both gain and phase mismatch. The HRM synthesizes eight effective LO frequencies and shows an 11.9-dB gain, 11.2-dB DSB NF, and +5.4-dBm in-band IIP3 in the fundamental mode. Greater than 72-dB HR3, 71-dB HR5, and 67-dB HR7 is achieved over ten IC samples in this mode without calibration or harmonic filtering. Harmonic rejection greater than 61 dB for LO factors 2-6 and 54 dB for LO factor 7 is observed, when modifying the effective LO frequency. The HRM achieves S11 better than -10 dB over 50-830 MHz and has a total power consumption of 67 mW from a 1.2-V supply.
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