Design and analysis of novel SRAM PUFs with embedded latch for robustness

Abstract

Physical Unclonable Function (PUF) is a cost-effective security primitive to address hardware attacks such as cloning, impersonation and Intellectual Property (IP) violation. Static Random-Access Memory (SRAM) PUF has been proposed; however, it suffers from challenges, some of which are environmental fluctuations such as voltage, temperature, and noise. Ensuring the robustness of SRAM PUF under such conditions is challenging. In this paper, we propose 8T SRAM PUF with a back-to-back PMOS latch to improve robustness by 4X. We also propose a low-power 7T SRAM with embedded Magnetic Tunnel Junction (MTJ) devices to enhance the robustness (2.3X to 20X) while lowering the leakage power and area overhead.