Design and analysis of low power Carbon Nanotube Field Effect Transistor (CNFET) D Flip-Flops (DFFs)

Abstract

This paper presents design and analysis of D Flip-Flops (DFFs) using Carbon Nanotube Field-Effect Transistors (CNFETs). Two different DFF circuits are implemented. Circuit performance of CNFET models have been compared to silicon based CMOS models in terms of Clk-Q delay, average power, power delay product (PDP), setup time, hold time, minimum operating voltage, area and average leakage power. CNFET DFFs have shown superior performance over CMOS DFFs in simulations for all the performance parameters.