Abstract

Adders are constituted as the fundamental blocks of arithmetic circuits and are considered important for computation devices. Approximate computing has become a popular and developing area, promising to provide energy-efficient circuits with low power and high performance. In this paper, 10T approximate adder (AA) and 13T approximate adder (AA) designs using carbon nanotube field-effect transistor (CNFET) technology are presented. The simulation for the proposed 10T approximate adder and 13T approximate adder designs were carried out using the HSPICE tool with 32 nm CNFET technology. The metrics, such as average power, power-delay product (PDP), energy delay product (EDP) and propagation delay, were carried out through the HSPICE tool and compared to the existing circuit designs. The supply voltage Vdd provided for the proposed circuit designs was 0.9 V. The results indicated that among the existing full adders and approximate adders found in the review of adders, the proposed circuits consumed less PDP and minimum power with more accuracy.

Highlights

  • There is a substantial demand for convenient and transportable applications, such as laptops, mobile phones, computers, etc., where energy efficiency has become a significant concern

  • Approximate adder and 13T approximate adder designs were carried out using the HSPICE tool with 32 nm carbon nanotube field-effect transistor- (CNFET) technology

  • The supply voltage Vdd provided for the proposed circuit designs was 0.9 V

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Summary

Introduction

There is a substantial demand for convenient and transportable applications, such as laptops, mobile phones, computers, etc., where energy efficiency has become a significant concern. These portable devices, such as mobile phones, laptops, etc., lead to reduced battery lifetime due to the increase in area size of the chip and consumption of power. Various approaches at different abstraction levels such as nano-technologies, and approximate computing, have been attempted. The essential factors such as the following: carbon nanotube field-effect transistor- (CNFET) based adders, full adders, approximate adders, subtractors, multipliers and ripple-carry adders (RCAs), hold the key to reducing transistor number, consumption of power, and area size. The energy efficiency of the circuit design can be achieved through reducing the number of transistors, technology used, and simulating under various conditions such as supply voltage, stability temperature of the circuit, average power, propagation delay, and power-delay product (PDP) [1,2,3]

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