Abstract
The main focus of this work is to study and analyze the Transmission Gate based combinational and sequential digital circuit performance using the Junctionless and BULK technology. The digital circuits chosen for this work are D-FLIP FLOP and MULTIPLEXER. Simulations are done in Tanner EDA and SILVACO. TSMC models of different channel lengths are taken for the measurement of various circuit parameters for BULK case. Finally, a comparison of Junction Less and BULK technology is given.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
