Abstract
Network on Chip (NoC) is a communication sub-system formed among the Intellectual Property (IP) cores in System on Chip (SoC). Routers, Links and network interface are the main components of Application SpecificNetworks-On-Chip(ASNoC).As the number of cores increases, the communication demand between the cores also raised insystem on chip. Especially, routers are the main reason for the power consumption in network on chip. In this paper, an Ant Lion Optimization (ALO) based reliable custom topology is proposed in order to reduce the power consumption, area with high speed. Normally, custom topology uses less number of routers than the regular topology. The planned work includes the design of router and ALO based reliable custom topology. Xilinx ISE design suite 14.5 is used for the design and validation of proposed method. From the implementation result, proposed topology is operated with low power and less area and high speed. The performance of flip flops, LUTs, Slices and frequency are shown in result section. When compared with other existing techniques our proposed method gives better outcomes.
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