Design and Analysis of a New Carbon Nanotube Full Adder Cell

M H Ghadiry,Hatef Sadeghi,M Nadi Senejani,Asrulnizam Abd Manaf,M T Ahmadi

doi:10.1155/2011/906237

Abstract

A novel full adder circuit is presented. The main aim is to reduce power delay product (PDP) in the presented full adder cell. A new method is used in order to design a full-swing full adder cell with low number of transistors. The proposed full adder is implemented in MOSFET-like carbon nanotube technology and the layout is provided based on standard 32 nm technology from MOSIS. The simulation results using HSPICE show that there are substantial improvements in both power and performance of the proposed circuit compared to the latest designs. In addition, the proposed circuit has been implemented in conventional 32 nm process to compare the benefits of using MOSFET-like carbon nanotubes in arithmetic circuits over conventional CMOS technology. The proposed circuit can be applied in very high performance and ultra-low-power applications.

Highlights

Fundamental limitations of CMOS technology and anticipations of Moore’s law have motivated researchers to find suitable alternative for these devices
Among several proposed alternatives [1,2,3,4,5], carbon nanotube field effect transistors seem to be a promising successor for CMOS devices due to their superior characteristics [1, 6]
CMOS [14] as basic circuit for comparison in standard CMOS technology and Hybrid [28] as one of the best circuits in terms of power and performance are implemented in standard CMOS

Summary

Introduction

Fundamental limitations of CMOS technology and anticipations of Moore’s law have motivated researchers to find suitable alternative for these devices. Among several proposed alternatives [1,2,3,4,5], carbon nanotube field effect transistors seem to be a promising successor for CMOS devices due to their superior characteristics [1, 6]. CNFETs indicate great potential further than silicon nanoelectronic, and significantly illustrate greater performance than conventional CMOS models specially in case of switching energy. Large transconductance of CNFETs creates huge interest in nanoelectronic circuits’ application as well. Several HSPICE models for CNFETs have been presented so far such as [6, 8]. Among several SPICE models for CNFET, only in [6] practical device, nonidealises, and more than one tubes are modelled

Methods

Results

Conclusion