Design analysis of Gate-All-Around nanowire tunnel field effect transistor

Abstract

In this paper the effect of physical design parameters on electrical characteristics of cylindrical tunnel field effect transistor has been studied by a numerical simulator. Simulations are performed on technology node varied from 40 nm to 20 nm based on which the results have been extracted at an optimized 30 nm channel length by employing different substrate material with assorted gate oxide material. Deviation in transfer characteristics have also been observed by varying thickness of gate oxide and work function of gate. Comparisons of different materials with oxides brought out nitride with silicon as the better combination, with ON current of about 1µA/µm and OFF current less than 1 pA/µm. This work gives an understanding of the involvement of physical parameters in the operation of the device.