Abstract
This paper investigates the performance of tri material gate tunnel field effect transistor (TMGTFET) device designed in gate all around (GAA) configuration. The device performance is analyzed by varying various device related parameters like: drain doping, oxide thickness and radius of silicon core. Simulations are performed using technology computer-aided design (TCAD) tool at 60 nm gate length. Simulation results show that the performance of TMGTFET device can be optimized by proper selection of device parameters so as to achieve improvements in the ON current, OFF current, sub-threshold swing and ambipolar current. The silicon based TMGTFET device demonstrates good performance which makes it a suitable candidate for low power applications with ON current of 0.386 µA/µm, average sub-threshold swing of 32.06 mV/decade, maximum current gain cut off frequency of 41.4 GHz and extremely low OFF current value of the order of 10-20A/µm. We have performed the device optimization to boost the ON current and improve the sub-threshold slope in order to make sure that this device configuration becomes suitable for both low power and high performance applications. The proposed hetero dielectric tri material gate tunnel FET device (HD-TFET) designed in gate all around configuration achieves 19.7 times improvement in ON current as compared to TMGTFET device and excellent average sub-threshold swing of 21.2 mV/decade. The maximum unity current gain frequency is also improved by 3 times indicating its potential for deployment in high frequency applications.
Highlights
Scaling of the device dimensions in MOSFETs has led to various challenges like enhancement in the short channel effects (SCEs), increase in the leakage current and reliability issues which needs to be addressed in order to ensure better performance of the VLSI circuits under low voltage operation
This paper investigates the performance of tri material gate tunnel field effect transistor (TMGTFET) device designed in gate all around (GAA) configuration
In order to enhance the ON current and sub-threshold slope the design of the GAA-TMGTFET device is modified and a high-K dielectric is introduced beneath the gate metal M1
Summary
Scaling of the device dimensions in MOSFETs has led to various challenges like enhancement in the short channel effects (SCEs), increase in the leakage current and reliability issues which needs to be addressed in order to ensure better performance of the VLSI circuits under low voltage operation. Vertical TFET design proposed in [8] can lead to ON current enhancement because of increase in the tunneling area as compared to lateral TFET device Ambipolar conduction is another important issue in TFET and this comes into picture when TFET device conducts current for both the higher value of positive and negative gate source voltage. Wang et al [16] proposed a novel barrier controlled TFET device in gate all around configuration which has triple material gate and results reported show that this configuration can lead to enhancement of ON current due to band bending at the source side with the added benefit of reduction in the OFF current due to the effective band pass filtering with the in channel barrier. Comparative study of the HD-TMGTFET device and TMGTFET device is done in section VI to analyze the RF and analog performance and in section VII conclusions are drawn
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