Abstract

Copper phthalocyanine (CuPc) films have been prepared on SiO2 and octadecyltrichlorosilane (OTS)-treated SiO2 (OTS/SiO2) substrates by vacuum deposition under different deposition pressures (Pdep) ranging from 10–4 to 10–1 Pa. Experimental results indicate that Pdep has an obvious influence on the morphologies and molecular packing structures of the CuPc films and, therefore, the performance of the resulting thin-film transistors (TFTs). Specifically, the grain sizes of the CuPc films keep almost unchanged for Pdep below 10–2 Pa and significantly increase for further increasing Pdep to 10–1 Pa on both SiO2 and OTS/SiO2. The interplanar spacings (D values) of the films increase on SiO2 and keep unchanged on OTS/SiO2 with increasing Pdep, which has also been rationalized by the molecular dynamics simulation. Field-effect measurements indicate that the electronic properties of the CuPc thin films are closely correlated with their microstructures, and the film prepared at higher Pdep gives the higher mobility. In addition to the general results that larger grain size favors the higher mobility similar to literature reports, both our experimental and theoretical results reveal that the interplanar spacing of the film also has a sensitive influence on the mobility of the CuPc TFTs, and the larger D value leads to the higher mobility. This study provides a convenient way to tune the morphology and molecular packing of the CuPc films to optimize the performance simply by regulating Pdep and discloses an important parameter, that is, the D value, associated with the device performance, which is significant for basic understanding and potential applications.

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