Dependability evaluation of SISO control-theoretic power managers for processor architectures

Abstract

Dynamic power managers are increasingly being deployed in modern embedded processors to meet performance/power requirements of new workloads. These computing systems are limited in their power dissipation, demanding a dependable power management scheme to guarantee the system's efficiency and dependability. Although several ad-hoc and heuristic power management approaches can be found in the literature, their main shortcoming is the lack of formal guarantees to ensure dependability of the processors. Control-theoretic approaches promise flexibility and robustness for power management strategies. However, the creation of a responsive yet stable controller requires the often neglected tasks of proper system identification and performance analysis for target applications. This paper presents dependability evaluation of Single-Input Single-Output (SISO) for power management on processor architectures. We also analyze the effect of frequent application phase changes on the responsiveness of controllers. We evaluate responsiveness of different class of applications to computer system control inputs such as DVFS. We illustrate the feasibility of hardware and software SISO controllers for power management using the Sniper simulator running SPLASH2 and microbenchmarks. Based on our observations, we provide guidelines for developing stable and robust SISO controllers for power management, show the scenarios where simple classic SISO controllers might not be effective, and identify early symptoms that may result in instability for power management controllers.