Demonstration of high-speed operation of an AC-biased front-end circuit for asuperconducting analogue-to-digital converter

Abstract

We tested the high-speed operation of a front-end circuit for a superconductinganalogue-to-digital (A/D) converter at a frequency of 10 GHz. The circuit consisted of a1-to-4 demultiplexer (DEMUX), flip-flops (FFs) and five-channel AC-biased stacked-typeamplifiers (Amps). Correct operation of the DEMUX and FFs was performedat a frequency of 10 GHz and output signals of 4.2 mV were obtained from theAmps at 2.5 GHz. In the circuit design, we focused on improvement of the outputcharacteristics and bias margin of the Amps. To obtain output signals from theAmps at 2.5 GHz, parasitic capacitances in the Amps were reduced and the falltimes of the output signals were decreased to 100 ps by isolating the ground planeunder the bias resistor. To prevent a steep decrease in the bias margins of themultichannel Amps due to interference between the Amps, bias resistors were designed toreduce the fluctuation rate of the bias current to within 1%. We experimentallyconfirmed that the decrease in the bias margin of five-channel operation waswithin 1% of that of single-channel operation. These results enabled us to operatea front-end circuit, including a modulator, at a sampling frequency of 10 GHz.