Demonstration of a 2-D SnS/MXene Nanohybrid Asymmetric Memristor

Abstract

This article demonstrates the fabrication and characterization of a low-cost, energy-efficient, easy-to-fabricate SnS/MXene memristor in which an SnS/Ti3C2Tx active layer is sandwiched in between two copper electrodes. The device has been showing substantial merits with an experimental <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text{off}}$ </tex-math></inline-formula> : <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text{on}}$ </tex-math></inline-formula> ratio of ~22 with good cyclic stability, exceptional reproducibility, and data retention capability up to 1000 cycles. This article explains the detailed physics governing the various regions of the proposed memristor characteristics in terms of the dual ionic conduction mechanism. Furthermore, the article explains the memristor’s asymmetric behavior using the concept of the trapping and de-trapping of charge carriers. Real-time band structures extracted using sophisticated ultraviolet photoelectron spectroscopy (UPS) strongly support the claims reported in this article. Finally, this article concludes with a practical application of the fabricated device as a low-cost, tunable asymmetric clock generator circuit.