Abstract

The electrical degradation of dry thermal SiO2 upon exposure to selective silicon epitaxy using dichlorosilane has been investigated. Capacitors were fabricated with thermal gate oxides (120 to 440A thick) grown on p-type silicon (100) substrates. Prior to the gate electrode formation, the oxides were exposed to hydrogen and dichlorosilane + hydrogen anneals. Leakage current and electric field breakdowns were measured to evaluate the effects of these anneals on the SiO2 degradation. The SiO2 degradation occurring because of dichlorosilane exposure was studied as a function of the temperature and time. While dichlorosilane exposure at temperatures above 850°C was found to cause high leakage current and breakdowns at low electric fields for silicon dioxide films thinner than 440A, little effect was observed as a result of hydrogen and chlorine exposures. The degradation mechanism was attributed to pinhole etching via volatile SiO formation along defects present in the as-grown SiO2.

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