Device isolation technology by selective low-pressure silicon epitaxy

Abstract

The technology of selective low-pressure silicon epitaxy as a new dielectric isolation technique for VLSI devices is described. A SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> layer structured by RIE is used as a mask to grow selectively monocrystalline silicon in the exposed silicon areas. The lateral isolated epitaxial islands form the active device areas. The selectivity of the process and the growth kinetics have been studied as a function of the deposition conditions, pretreatment of the wafers and fraction of unmasked surface area. Using low pressure epitaxy it is possible to improve essentially film properties especially regarding the homogeneity of the epitaxial layer thickness. With the aid of this technology MOS devices have been fabricated.