Abstract
Degradation of a Schmitt trigger of the CMOS logic under the effect of ultrashort electrical pulses (USPs) is studied. It is shown that narrowing of the uncertainty region for a Schmitt trigger occurs under the effect of USPs. The circuit of the trigger has been simulated with all possible breakdowns of the MOS transistor taken into consideration. An experimental setup making it possible to determine the critical parameters of the effect of USPs on integrated circuits of triggers and CMOS structures is described.
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