Degradation and Failure of Flexible Low-Temperature Poly-Si TFTs Under Dynamic Stretch Stress

Abstract

Degradation and failure behaviors of the flexible low-temperature poly-Si (LTPS) thin film transistors (TFTs) under repetitive stretch stress parallel to channel length (L) direction are investigated. A geometric effect is observed in degradation of the threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ), which depends on the channel width (W) and active area ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">WL</i> ), while has a weak correlation with L. Three failure modes of TFTs are identified from their I-V characteristics: damage in the gate insulator (GI), channel traps generation, and metal line cracks. Failure statistics show that the GI failure has a low failure rate and follows the exponential distribution, while the other two modes have high failure rates in the early stage of the stretch cycles, and their failure distributions follow the limited failure population (LFP) model.