Defect engineering aspects of advanced Ge process modules

Abstract

Germanium receives world-wide a renewed interest due to its strong potential as high-mobility channel material for deep submicron high-performance technologies. Ge processing has been demonstrated to be compatible with Si technology and has the important benefit that compared to Si lower thermal budgets are required for dopant activation and implantation-induced defect anneal. However, many challenges remain, like interface passivation, gate stack formation, contact technology, and the fabrication of high-performing n-channel devices. This review will cover some advanced Ge processing modules from a viewpoint of defect control and engineering. Attention is first briefly given to defect aspects related to the fabrication of bulk Ge substrates or thin Ge films on either oxide or Si. Next shallow junction formation is addressed, where the thermal anneal procedure must be optimised for minimising junction depth without compromising dopant activation and defect annealing. The discussion will focus on different dopant species such as B, P, As and Sb. Finally, the contact technology is addressed for a variety of germanides, i.e., Co, Cu, Ni, Fe, Pd, Pt, etc. A control of the metal interaction with point defects and geometrical effects play a crucial role for performance optimisation and yield enhancement.