Deep sub-100 nm Ge CMOS devices on Si with the recessed S/D and channel

Abstract

We report on comprehensive studies of Ge CMOS devices with the recessed channel and S/D fabricated on a Ge-on-insulator (GeOI) substrate. Both nFETs and pFETs with channel lengths (L ch ) from 500 to 20 nm, channel thicknesses (T ch ) from 90 to 15 nm, EOTs from 5 to 3 nm, and gate stacks with and without the post oxidation (PO) are investigated. Benefiting from the fully depleted ultra-thin body (FD-UTB) channel with a reasonable interface, a low sub-threshold slope (SS) of 95 mV/dec is obtained in a 60 nm L ch nFET and a record high I ON /I OFF ratio of 106 is realized in a 300 nm L ch nFET. The recessed contact strongly dependents on the recessed depth and optimized recessed depth significantly improves the Ge contacts.