Decoupling Structures for Millimeter Wave Integrated Circuits in Digital CMOS Processes

Abstract

This brief studies the effect of nonideal decoupling structures on the performance of single-ended circuits operating at the millimeter wave frequency range. Based on a first-order approximation, an upper limit on the impedance of decoupling structures is derived, given a prespecified accepted degradation in insertion loss. To verify the analysis, a 110-GHz single-ended amplifier with a compact decoupling structure based on distributed interdigitized metal-oxide-metal capacitor is implemented. The full-wave electromagnetic simulations of the decoupling structure show an input impedance of (0.47 – j0.12) $\Omega $ at 110 GHz, and the magnitude is less than $1~\Omega $ from 82 to 144 GHz. The degradation in the insertion loss of the matching network is simulated to be less than 0.5-dB compared with the use of ideal decoupling capacitors at 110 GHz. The area of the decoupling structure is $18\times 100 ~\mu \text{m}^{2}$ when implemented in 65-nm digital CMOS process.